Changes between Version 3 and Version 4 of Tutorials/k0SDR/Tutorial13

Timestamp:

Sep 8, 2015, 7:00:07 PM (10 years ago)

Author:

prasanthi

Comment:

—

Tutorials/k0SDR/Tutorial13

@@ -38 +38 @@
 
 XMD%
+}}}
 
+Program the FPGA with cr_top_spec_sense_rx.bit
+{{{
+XMD% fpga -f cr_top_spec_sense_rx.bit
+Programming Bitstream -- cr_top_spec_sense_rx.bit
+Fpga Programming Progress ............10.........20.........30.........40.........50.........60.........70.........80.........90........Done
+Successfully downloaded bit file.
+
+JTAG chain configuration
+--------------------------------------------------
+Device   ID Code        IR Length    Part Name
+ 1       4ba00477           4        Cortex-A9
+ 2       03727093           6        XC7Z020
+
+0
+XMD%
+}}}
+
+Connect XMD to the ARM processor
+{{{
+XMD% connect arm hw
+
+JTAG chain configuration
+--------------------------------------------------
+Device   ID Code        IR Length    Part Name
+ 1       4ba00477           4        Cortex-A9
+ 2       03727093           6        XC7Z020
+
+--------------------------------------------------
+Enabling extended memory access checks for Zynq.
+Writes to reserved memory are not permitted and reads return 0.
+To disable this feature, run "debugconfig -memory_access_check disable".
+
+--------------------------------------------------
+
+CortexA9 Processor Configuration
+-------------------------------------
+Version.............................0x00000003
+User ID.............................0x00000000
+No of PC Breakpoints................6
+No of Addr/Data Watchpoints.........4
+
+Connected to "arm" target. id = 64
+Starting GDB server for "arm" target (id = 64) at TCP port no 1234
+XMD%
+}}}
+
+Source ps7_init_tx_rx.tcl. This file contains initialization procedures for the ARM processor and programmable logic. Run ps7_init and ps7_post_config
+{{{
+XMD% source ps7_init_tx_rx.tcl
+XMD% ps7_init
+XMD% ps7_post_config
+XMD%
 }}}