Changes between Version 8 and Version 9 of Hardware/bDomains/cSandboxes/fSB6


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Timestamp:
Apr 16, 2013, 6:40:18 PM (12 years ago)
Author:
seskar
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  • Hardware/bDomains/cSandboxes/fSB6

    v8 v9  
    11==== SB6 ====
    22[[TOC(Hardware, Hardware/bDomains, Hardware/bDomains/cSandboxes*, depth=6)]]
    3 SB6 is dedicated to experimenting with [http://crkit.orbit-lab.org GENI Cognitive Radio (CRKit) platform]. Each of the two nodes, in addition to standard !WiFi ([wiki:Hardware/fDevices/cIntel2200 Intel 2915]) and WiMAX ([wiki:Hardware/fDevices/dIntel6250 Intel 6250]) card, has [http://crkit.orbit-lab.org CRKit] with [http://crkit.orbit-lab.org/wiki/Hardware/RFBoards/aSDR1 SDR] device attached through dedicated Ethernet interface (eth2).
     3SB6 is dedicated to experimenting with variety of Software Defined Radio (SDR) platforms. Currently it has three different platforms as shown in diagram below:
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    5 ||[[Image(SB6.jpg, 400px, link=, align=center)]] || [[Image(SB6-Photo.jpg, 400px)]] ||
     5||[[Image(SB6.jpg, width=600px, link=, align=center)]] ||
     6|| [[Image(SB6-Photo.jpg, width=600px)]] ||
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    7         The CRKIT is connected to a host machine (node) via a JTAG to USB interface. This interface is used by software in the Xilinx SDK (Impact and Xilinx Bash Shell) to program the Vertex-5 FPGA. After all the programming has been performed over JTAG, the on board Ethernet controller takes over and communication between the node and the CRKit takes place via the Gigabit Ethernet interface with UDP packets.More details on the protocol are available at [http://crkit.orbit-lab.org] ; Basic tutorial is available at [wiki:/Tutorials/CRKit ]
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     9 * [http://crkit.orbit-lab.org GENI Cognitive Radio (CRKit) platform]. Each of the two nodes, in addition to standard !WiFi ([wiki:Hardware/fDevices/cIntel2200 Intel 2915]) and WiMAX ([wiki:Hardware/fDevices/dIntel6250 Intel 6250]) card, has [http://crkit.orbit-lab.org CRKit] with [http://crkit.orbit-lab.org/wiki/Hardware/RFBoards/aSDR1 SDR] device attached through dedicated Ethernet interface (eth2). The CRKIT is also connected to a host machine (node) via a JTAG to USB interface. This interface is used by software in the Xilinx SDK (Impact and Xilinx Bash Shell) to program the Vertex-5 FPGA. After all the programming has been performed over JTAG, the on board Ethernet controller takes over and communication between the node and the CRKit takes place via the Gigabit Ethernet interface with UDP packets.More details on the protocol are available at [http://crkit.orbit-lab.org] ; Basic tutorial is available at [wiki:/Tutorials/CRKit ]
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     11 * WARP platform
     12 * Parallela based SDR platform